Digital's DECSYSTEM-20 - Part 7 - Console

DECSYSTEM-20 CONSOLE (Part 7)

The KY11-C Console was located in the cabinet # 1 on the high right (see next picture).

Cabinet # 1 (front end processor cabinet)

KY11-C Console Panel abowe the PDP-11/40 drawer

Digital's DECSYSTEM-20 - Part 6 - Power

DECSYSTEM-20 POWER (Part 6)

As all old mainframes so was DECSYSTEM-20 (PDP-10 / KL10) also power hungry. That was due to the development coal that speed was always desired over energy saving.

DECSYSTEM-20 had enough power to serve as a heater in a sauna

Digital's DECSYSTEM-20 - Part 5 - CPU (KL10)

CPU CABINET - Cabinet # 3 (Part 5)

The  KL-10 (in DECSYSTEM-20) introduced in 1974 was a 36-bit word size, magnetic core (later semiconductor) memory, capacity of 32K to 4096K (4M) words 500 nanosecond instruction cycle, 1.8 MIPS CPU. The fast speed was partially  possible due to the cache memory technology.

Magnetic core memory. 1951 Jay Forrester filed a patent application for the matrix core memory. Core memory was born

Digital's DECSYSTEM-20 - Part 4 - Input/Output for CPU

INPUT/OUTPUT CABINET for MAIN CPU (Part 4)

The I/O cabinet connected the main processor KL10 to the peripherial devices via MASSBUS or UNIBUS (see the following picture). MASSBUS was for fast and large amounts of data transfer and UNIBUS was for slow terminals, printers and similar.

DECSYSTEM-20 block diagram

Digital's DECSYSTEM-20 - Part 3 - Front End (PDP-11/40)

 FRONT END CABINET (PDP-11/40) (Part 3)

As already told before in this article series the DECSYSTEM-20 (PDP-10 / KL10) was delivered in 3 cabinets as seen in the following picture. The front end processor (PDP-11/40) was located in the number 1 cabinet, the left most, with the expansion drawer to hold application specific variable system parts. The whole system could have more than 3 cabinets if more space was required.

Cabinet # 1 the left most cabinet

Digital's DECSYSTEM-20 - Part 2 - Cabinets

DECSYSTEM-20 CABINETS (Part 2)

DECSYSTEM-20 and some of its peripherial devices