Digital's DECSYSTEM-20 - Part 2 - Cabinets

DECSYSTEM-20 CABINETS (Part 2)

DECSYSTEM-20 and some of its peripherial devices

The DECSYSTEM-20 (PDP-10 / KL10) was usually delivered in 3 cabinets:

1. Front End Processor (and floppy disc drives) cabinet
2. I/O logic cabinet (MASSBUS and UNIBUS interfaces) [also memory in some models]
3. CPU (and memory) cabinet

DECSYSTEM-20 in 3 cabinets

The blue areas in the following block diagram show the 3 cabinets again.

DECSYSTEM-20 block diagram

Each box in the block diagram is one or more Printed Circuit Boards (PCB). For example the front end processor is the functional block KD11-A and it consists of 5 or more PCB's in the 11/40 drawer.


DECSYSTEM-20 PARTS (see block diagram above)

Cabinet # 1: Front end processor

• RH11  -  Massbus Controller (Unibus) for TU45 tape, or RP/RM disk
• MF11-U   -  Core Memory System
• KD11-A  -  Processor (PDP-11/35 or PDP-11/40)
• KY11-D  -  Programmers Console
• DL11-C  -  Asynchronous Line Interface
• RX11  -  Floppy Disc Subsystem
• RX01  -  Dual Floppy Disk
• DC20  -  DH11's in a KL10 front end (available in 8 or 16 ports)
• DH11  -  Asynchronous 16 Line Multiplexer
• LP20  -  Line Printer Controller (890 lpm)
• BM873  -  Restart Loader ROM
• DL11-E KLINIK  -  Serial Line Unit / Remote Diagnosis System
• DL11-E  -  Serial Line Unit (SLU) Real-Time Clock

Cabinet # 2: Input/Output logic

• DTE20  -  Ten-Eleven Interface Unit (PDP-10 to PDP-11 Interface Unit)
• RH20  -  MASSBUS to CPU channel bus (internal) Interface Controller

Cabinet # 3: CPU and memory

• KL10  -  Third PDP-10 CPU (ECL logic) used in 108x/109x/2040/2050/206x
• MA20  -  32-256KW 1.0us parity internal memory

External Parts (see part 1 of this article for details about peripheral parts)

• DN2x  -  Remote Station Mini Computer
• LA36  -  DecWriter Paper Terminal
• LP14  -  Line Printer
• RP06  -  Disc Drive (Memorex 677)
• TU45  -  Vacuum Tape Unit

Since the memory technology developed very fast during the life time of KL10 there was many memory options starting from magnetic core memories and ending to semiconductor memories with cache memories. The cache memory was discovered in 1972 to be a big boost in the system performance (see the following table where average KL10 instruction times are compared to the KA10 [KA10 is 1.0]).

Memory	Av instr time	Perf ratio
KA10	4.38	1.00
KL10 7400	2.82	1.55
KL10 ECL S	2.41	1.82
KL10 ECL E	2.16	2.03
KL10 7400 Cache	2.12	2.07
KL10 ECL S Cache	1.25	3.50
KL10 ECL E Cache	0.69	6.39

Here are some of those memory options listed.

• MA20 32-256KW 1.0us parity internal memory (2 ctrls w/ 4 modules of 32K)
• MB20 64-512KW 1.2us parity internal memory (2 ctrls w/ 4 modules of 64K)
• MCA20 pager/cache memory (109x/2060)
• MCA25 pager/cache memory (2065)
• MF20 256K-1563KW 667ns ECC (36+6ECC+1parity+1spare) internal MOS (16K chips)
• MG20 1-4MW 467ns ECC (36+7ECC+1spare) internal MOS (64K chips)

Here are the front and rear views of the DECSYSTEM-20 cabinets with part names.

Front view (Cabinets 1, 2, and 3)

Rear view (Cabinets 3, 2, and 1)

The following picture shows the interconnections in a KL10-C processor and between the cabinets.

KL10-C Interconnections, rear view

In some versions the memory racks were installed in the doors of cabinet # 2 so that was an additional interconnection. Also some models did have channel bus and that also connected from cabinet # 3 to # 2. Most details can be figured out of document /1/.

Printed circuit board taping done in four times final size at Digital

[Next parts of this series will handle cabinets in more detail.]


REFERENCES

/1/ MP01708_KL10-R_System_Drawings_Sep83.pdf

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